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|Title=Second International Workshop on High-Performance Reconfigurable Computing Technology and Applications | |Title=Second International Workshop on High-Performance Reconfigurable Computing Technology and Applications | ||
|Type=Workshop | |Type=Workshop | ||
| − | | | + | |Official Website=http://www.ncsa.uiuc.edu/Conferences/HPRCTA08 |
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|City=Austin | |City=Austin | ||
| − | | | + | |Region=TX |
| − | |Country= | + | |Country=Country:US |
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|wikicfpId=3427 | |wikicfpId=3427 | ||
|pageCreator=127.0.0.1 | |pageCreator=127.0.0.1 | ||
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|Start Date=Nov 17, 2008 | |Start Date=Nov 17, 2008 | ||
|End Date=Nov 17, 2008 | |End Date=Nov 17, 2008 | ||
| + | |Academic Field=Computer Science | ||
| + | |Event Status=as scheduled | ||
| + | |Event Mode=on site | ||
}} | }} | ||
| + | {{Event Deadline | ||
| + | |Notification Deadline=Oct 15, 2008 | ||
| + | |Camera-Ready Deadline=Nov 1, 2008 | ||
| + | |Submission Deadline=Sep 15, 2008 | ||
| + | }} | ||
| + | {{S Event}} | ||
<pre> | <pre> | ||
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Dave Bennett, Xilinx | Dave Bennett, Xilinx | ||
Duncan Buell, University of South Carolina | Duncan Buell, University of South Carolina | ||
| − | Roger | + | Roger Chamberlain, Washington University |
Katherine Compton, University of Wisconsin-Madison | Katherine Compton, University of Wisconsin-Madison | ||
Aravind Dasu, Utah State | Aravind Dasu, Utah State | ||
Latest revision as of 14:56, 19 October 2022
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Venue
Austin, TX, United States of America
Warning: Venue is missing. The map might not show the exact location.
Second International Workshop on High-Performance Reconfigurable Computing Technology and Applications (HPRCTA'08) Held in conjunction with SC08 Nov. 17, 2008 Austin, TX High-performance reconfigurable computing (HPRC) based on the combination of conventional microprocessors and field-programmable gate arrays (FPGAs) is a rapidly evolving computing paradigm that offers the potential to accelerate computationally intensive scientific applications beyond what is possible on today's HPC systems. The academic community has been actively investigating this technology for the past decade, and the technology has proven itself to be practical for a number of HPC applications. Many HPC vendors are now offering or are planning to offer various HPRC solutions. The goal of this workshop, co-located with SC08, is to provide a forum for academic researchers and industry to discuss the latest trends and developments in the field, and to set a research agenda for the upcoming years on the use of FPGA technology in high-performance computing. Important dates Papers due: Sept. 15, 2008 -- firm deadline, cannot be extended! Notification of acceptance: Oct. 15, 2008 Final camera-ready manuscripts due: Nov. 1, 2008 Workshop: Nov. 17, 2008 Program committee Volodymyr Kindratenko (workshop co-chair), NCSA Tarek El-Ghazawi (workshop co-chair), George Washington University Dave Bennett, Xilinx Duncan Buell, University of South Carolina Roger Chamberlain, Washington University Katherine Compton, University of Wisconsin-Madison Aravind Dasu, Utah State Matthias Fouquet-Lapar, SGI Kris Gaj, George Mason University Alan D. George, University of Florida Maya Gokhale, Lawrence Livermore National Laboratory Martin Herbordt, Boston University Stefan Möhl, Mitrionics Mark Parsons, Edinburgh Parallel Computing Centre David Pellerin, Impulse Gregory Peterson, University of Tennessee Craig Petrie, Nallatech Dan Poznanovic, SRC Computers Melissa C. Smith, Clemson University Eric Stahlberg, OpenFPGA Craig Steffen, NCSA Olaf Storaasli, Oak Ridge National Laboratory Dave Strenski, Cray Tom VanCourt, Altera
This CfP was obtained from WikiCFP
