(mobo import Concept___Event_For_Confident-migrated) |
m (Text replacement - "([-])User:Curator 83" to "$1Ch") |
||
Line 36: | Line 36: | ||
* Novel and innovative interconnect architectures | * Novel and innovative interconnect architectures | ||
* Multi-core processor interconnects | * Multi-core processor interconnects | ||
− | * System-on- | + | * System-on-Chip Interconnects |
* Advanced chip-to-chip communication technologies | * Advanced chip-to-chip communication technologies | ||
* Optical interconnects Protocol and interfaces for inter-processor communication | * Optical interconnects Protocol and interfaces for inter-processor communication |
Revision as of 11:39, 7 July 2022
Topics of Interest
- Novel and innovative interconnect architectures
- Multi-core processor interconnects
- System-on-Chip Interconnects
- Advanced chip-to-chip communication technologies
- Optical interconnects Protocol and interfaces for inter-processor communication
- Survivability and fault-tolerance of inter-connects
- High-speed packet processing engines and network processors
- Systems software for communication
- System and storage area network architectures and protocols
- High-performance host-network interface architectures
- High-bandwidth and low-latency I/O
- Pb/s switching and routing technologies
- Innovative architectures for supporting collective communication
- Novel communication architectures to support cloud & grid computing
- Centralized and distributed cloud interconnects
- Requirements driving high-performance interconnects
- Traffic characterization for HPC systems and commercial data centers
- Software-defined networking and software overlay networks
- Software for network bring-up, configuration and performance management (OpenFlow, OpenSM)
- Data Center Networking